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  ? semiconductor components industries, llc, 2014 august, 2014 ? rev. 0 1 publication order number: esd7124/d esd7124 4-channel low capacitance dual-voltage esd and surge protection array features ? 3 channels of low voltage esd protection ? 1 channel of high voltage esd protection ? provides esd protection to iec61000?4?2 level 4: 25 kv contact discharge ? iec 61000?4?5 (lighting) ? low channel input capacitance ? high voltage zener diode protects supply rail up to 100 a (8/20  s) ? these devices are pb?free and are rohs compliant application diagram vcc (1) ch1 (2) ch2 (3) ch3 (4) dap** **die attach pad on back of package (connect to ground) gnd (5) gnd (6) high?speed data lines marking diagram device package shipping ? ordering information block diagram http://onsemi.com udfn?6 (pb?free) 3000/tape & reel ESD7124MUTBG udfn?6 d4 suffix case 517cs ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specification brochure, brd8011/d. ad = specific device code m = date code  = pb?free package ad m  1 io1 io3 io2 vcc
esd7124 http://onsemi.com 2 table 1. pin descriptions 4?channel, 6?lead, udfn?8 package pin name type description 1 v cc hv v dd hv esd channel 2 ch1 i/o lv low?capacitance esd channel 3 ch2 i/o lv low?capacitance esd channel 4 ch3 i/o lv low?capacitance esd channel 5 gnd ground 6 gnd ground package / pinout diagrams pin 1 marking 6?lead udfn top view (pins down view) bottom view (pins up view) 1234 65 xx m 6 5 1 2 3 4 specifications table 2. absolute maximum ratings parameter rating units operating temperature range ?55 to +125 c storage temperature range ?65 to +150 c stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above t he recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may af fect device reliability. table 3. electrical characteristics device name reverse working voltage breakdown voltage vbr (v) reverse current leakage ir (  a) rdyn junction capactance cj(pf) vrwm (v) at 1 ma at vrwm  vr = 0 v, f = 1 mhz max min typ max typ typ max pin2-4 (lv) 3.3 5.5 6.5 1 1 0.35 0.5 pin1 (hv) 12 13.3 14 1 device name clamping voltage vc (v) tp = 8 x 20  s max ratings tp = 8 x 20  s ipp = 1 a ipp = 16 a ipp (a) vc @ max ipp (v) typ typ max max pin1 (hv) 15 16 100 27 pin2-4 (lv) 9.5 parameter symbol conditions min typ max unit clamping voltage tlp (note 1) all devices pin2-4(lv) see figures 3 ? 6 v c i pp = 8 a iec 61000?4?2 level 2 equivalent ( 4 kv contact, 4 kv air) 16.8 v i pp = 16 a iec 61000?4?2 level 4 equivalent ( 8 kv contact, 15 kv air) 24.9 1. ansi/esd stm5.5.1 ? electrostatic discharge sensitivity testing using transmission line pulse (tlp) model. tlp conditions: z 0 = 50  , t p = 100 ns, t r = 4 ns, averaging window; t 1 = 30 ns to t 2 = 60 ns.
esd7124 http://onsemi.com 3 typical characteristics figure 1. capacitance over frequency figure 2. insertion loss interface data rate (mb/s) fundamental frequency (mhz) 3 rd harmonic frequency (mhz) esd7124 insertion loss (db) usb 2.0 480 240 (m1) 720 (m2) m1 = 0.031 m2 = 0.047 figure 3. positive tlp i?v curve figure 4. negative tlp i?v curve ipk (a) ipk (a) 35 30 25 20 15 10 5 0 0 5 10 15 20 25 30 45 0 ?5 ?10 ?15 ?20 ?25 ?30 ?35 ?40 ?35 ?30 ?25 ?20 ?15 ?5 0 vpk (v) vpk (v) 35 40 ?10
esd7124 http://onsemi.com 4 transmission line pulse (tlp) measurement transmission line pulse (tlp) provides current versus voltage (i?v) curves in which each data point is obtained from a 100 ns long rectangular pulse from a charged transmission line. a simplified schematic of a typical tlp system is shown in figure 5. tlp i?v curves of esd protection devices accurately demonstrate the product?s esd capability because the 10s of amps current levels and under 100 ns time scale match those of an esd event. this is illustrated in figure 6 where an 8 kv iec 61000?4?2 current waveform is compared with tlp current pulses at 8 a and 16 a. a tlp i?v curve shows the voltage at which the device turns on as well as how well the device clamps voltage over a range of current levels. for more information on tlp measurements and how to interpret them please refer to and9007/d. figure 5. simplified schematic of a typical tlp system dut l s oscilloscope attenuator 10 m  v c v m i m 50  coax cable 50  coax cable figure 6. comparison between 8 kv iec 61000?4?2 and 8 a and 16 a tlp waveforms
esd7124 http://onsemi.com 5 package dimensions notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeters. 3. dimension b applies to plated terminals and is measured between 0.15 and 0.30mm from the terminal tip. 4. coplanarity applies to the exposed pad as well as the terminals. a seating plane d e 0.10 c a3 a a1 2x 2x 0.10 c udfn6, 1.8x2, 0.4p case 517cs issue o dim a min max millimeters 0.45 0.55 a1 0.00 0.05 a3 0.125 ref b 0.15 0.25 d d2 e e2 e l pin one reference 0.05 c 0.05 c note 4 e1/2 d2 e2 4 6 1 l 5 1.80 bsc 0.35 0.55 2.00 bsc 0.74 0.94 0.40 bsc 0.20 0.40 bottom view mounting footprint* recommended dimensions: millimeters *for additional information on our pb?free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. 2x l1 detail a l alternate constructions l ?? ?? l1 --- 0.15 side view top view b 6x c e1 0.80 bsc e2 0.95 bsc 2x a 0.07 c note 3 e2 b b 4 6 6x 1 5 0.05 c supplemental 0.10 c 0.10 c e1 6x e e/2 bottom view 6x 0.48 0.95 0.40 pitch 6x 0.25 0.40 pitch 0.55 2x 2.20 2x 0.94 package outline on semiconductor and are registered trademarks of semiconductor co mponents industries, llc (scillc). scillc owns the rights to a numb er of patents, trademarks, copyrights, trade secrets, and other inte llectual property. a listing of scillc?s pr oduct/patent coverage may be accessed at ww w.onsemi.com/site/pdf/patent?marking.pdf. scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and s pecifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/ or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including ?typical s? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the right s of others. scillc products are not designed, intended, or a uthorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in whic h the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or us e scillc products for any such unintended or unauthorized appli cation, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unin tended or unauthorized use, even if such claim alleges that scil lc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyrig ht laws and is not for resale in any manner. p ublication ordering information n. american technical support : 800?282?9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81?3?5817?1050 esd7124/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303?675?2175 or 800?344?3860 toll free usa/canada fax : 303?675?2176 or 800?344?3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your loc al sales representative


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